Renesas Electronics /R7FA6M3AH /ETHERC0 /PIR

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Interpret as PIR

MMD=0

PHY Interface Register

MDC	MII/RMII Management Data ClockThe MDC bit value is output from the ETn_MDC pin to supply the management data clock to the MII or RMII.
MMD	MII/RMII Management Mode 0 (0): Read 1 (1): Write
MDO	MII/RMII Management Data-OutThe MDO bit value is output from the ETn_MDIO pin when the MMD bit is 1 (write). The value is not output when the MMD bit is 0 (read).
MDI	MII/RMII Management Data-InThis bit indicates the level of the ETn_MDIO pin. The write value should be 0.

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